Power semiconductor device

ABSTRACT

The present invention relates to power semiconductor devices, and particularly to a power semiconductor device having a plurality of semiconductor device modules; an object of the invention is to provide semiconductor device modules which are capable of solving problems caused by the presence of the control board, and facilitating electric connection between power semiconductor elements and main circuit terminals and lightening restrictions on the number and layout of the power semiconductor elements.  
     To achieve the object above, a control emitter relay terminal ( 7 ), a gate relay terminal ( 8 ), and a relay terminal ( 9 ) are connected to a control board ( 10 ) disposed above an edge portion of the semiconductor device module ( 100 ). The control board ( 10 ) has control circuitry and elements for controlling operations of an IGBT device ( 1 ) and a diode device ( 2 ), and also has a control emitter interconnection pattern to which the control emitter relay terminal ( 7 ) is connected and a gate interconnection pattern to which the gate relay terminal ( 8 ) is connected, where these interconnection patterns are connected to the control circuitry.

TECHNICAL FILED

[0001] The present invention relates to power semiconductor devices andparticularly to a power semiconductor device which has a plurality ofsemiconductor device modules.

BACKGROUND ART

[0002]FIG. 11 is a perspective view that shows a semiconductor devicemodule 90 as an example of a conventional power semiconductor device.FIG. 11 is partially broken to show the internal structure.

[0003] As shown in FIG. 11, the semiconductor device module 90 has powersemiconductor elements, not shown, that are accommodated in a box-likeresin case 11, and a control board CB disposed above the powersemiconductor elements.

[0004] The control board CB has control circuitry and elements forcontrolling the operation of the power semiconductor elements, such asan IGBT (Insulated Gate Bipolar Transistor) device and a diode device,and the control board CB is contained inside to allow the semiconductordevice module 90 to work as an IPM (Intelligent Power Module).

[0005] The control board CB is disposed to almost entirely cover thearea where the power semiconductor elements are located and iselectrically connected to the power semiconductor elements throughconnecting means not shown. On its upper main surface, a derive terminalOT is provided to externally output the operating conditions of thepower semiconductor elements inside and to supply power to the controlcircuitry; the derive terminal OT protrudes from the top surface of theresin case 11 so that it can be electrically connected to the outside.The resin case 11 is sealed with resin material, though the drawing doesnot show the resin.

[0006] Main circuit terminals M1 and M2 for input/output of the maincurrent flowing in the internal power semiconductor elements areprovided in a peripheral portion not covered with the control board CBand protrude from the peripheral portion of the top surface of the resincase 11 so that it can be electrically connected to the outside.

[0007] While the semiconductor device module 90 is structured as shownabove, there are other semiconductor device modules in which the controlboard CB is located on the same plane as the power semiconductorelements.

[0008] While the conventional semiconductor device module 90 containsthe control board BC inside as shown above, this structure may restrictthe position of the main circuit terminals M1 and M2, or the lead pathsof the main circuit terminals M1 and M2 to be longer, which increasesthe inductance and may affect the performance of the semiconductordevice module by, e.g. increasing the surge voltage.

[0009] Also, in a semiconductor device module in which the control boardis placed on the same plane as the power semiconductor elements, thearea for installation of the power semiconductor elements is limited,which limits the number and layout of the power semiconductor elementsinstalled. Disclosure of the Invention

[0010] The present invention has been made to solve the problems shownabove, and an object of the invention is to provide a semiconductordevice module which is capable of solving problems caused by thepresence of the control board, and facilitating the electric connectionbetween the power semiconductor elements and main circuit terminals andlightening restrictions on the number and layout of the powersemiconductor elements.

[0011] According to a first aspect of the invention, a semiconductordevice module includes: a plurality of semiconductor device modules eachcomprising a resin case, a power semiconductor element accommodated insaid resin case, a main circuit terminal protruding outward from saidresin case and in which a main current of said power semiconductorelement flows, and a control terminal protruding outward from said resincase and to which a control signal for controlling said powersemiconductor element is inputted; a bus bar electrically connecting incommon said main circuit terminals of said plurality of semiconductordevice modules, said main circuit terminals being arranged in line; anda control board disposed to at least cover a disposed area of saidprotruding control terminals of said plurality of semiconductor devicemodules and electrically connected to said control terminals.

[0012] In accordance with the first aspect of the semiconductor devicemodule of the invention, the lead path of the of the power semiconductorelement can be selected freely because the control board is disposedoutside the semiconductor device module. This facilitates makingelectric connection between the power semiconductor element and the maincircuit terminal. Providing the control board outside also lightensrestrictions on the number and layout of the power semiconductorelements installed. Furthermore, the plurality of semiconductor devicemodules are arranged so that their respective main circuit terminals arealigned and the main circuit terminals are electrically connected incommon by the bus bar, so that the bus bar functions also as means formechanically connecting the plurality of semiconductor device modules,which offers a structurally stronger power semiconductor device withoutthe need for specialized connecting means.

[0013] According to a second aspect of the semiconductor device moduleof the invention, said control terminal protrudes outward from an edgeportion of said resin case, and said control board is disposed to coveronly an area over said edge portions of said plurality of semiconductordevice modules from which said control terminals protrude.

[0014] According to the second aspect of the semiconductor device moduleof the invention, the control board is disposed to cover only the areaover the edge portions of the plurality of semiconductor device modulesfrom which the control terminals protrude, which allows the controlboard to be sized smaller.

[0015] According to a third aspect of the semiconductor device module ofthe invention, said plurality of semiconductor device modules arearranged in rows so that their respective said edge portions from whichsaid control terminals protrude lie next to each other, and said controlboard is disposed to extend over said edge portions across from one saidrow to another of said plurality of semiconductor device modules.

[0016] According to the third aspect of the semiconductor device moduleof the invention, the plurality of semiconductor device modules arearranged so that the edge portions from which their respective controlterminals protrude lie next to each other; the control terminals thusstand close to each other and the control board can be small in size.

[0017] According to a fourth aspect of the semiconductor device moduleof the invention, said control board is disposed above said bus bar andis sized to cover almost all the region where said plurality ofsemiconductor device modules are disposed.

[0018] According to the fourth aspect of the semiconductor device moduleof the invention, the control board is sized to cover almost all areawhere the plurality of semiconductor device modules are disposed and thecontrol board is placed above the bus bar, which eliminates the need toform opening etc. in the control board so that the main circuitterminals can pass through there, thus offering a strong and firmcontrol board. This structure also increases the freedom of the layoutof the plurality of semiconductor device modules.

[0019] According to a fifth aspect of the semiconductor device module ofthe invention, said control board is disposed to cover said plurality ofsemiconductor device modules except in an area where said main circuitterminals are disposed.

[0020] According to the fifth aspect of the semiconductor device moduleof the invention, the structure increases the freedom of the layout ofthe plurality of semiconductor device modules.

[0021] According to a sixth aspect of the semiconductor device module ofthe invention, said control board has an interconnection patternelectrically connecting said control terminals in common, and saidinterconnection pattern has a non-loop shape in a plan view.

[0022] According to the sixth aspect of the semiconductor device moduleof the invention, the interconnection pattern has a non-loop shape inthe plan view, which prevents the problem that the main circuit currentflowing through the main circuit terminals exerts influence to cause acircular flow of induced current which would vary characteristics of thepower semiconductor elements.

[0023] According to a seventh aspect of the invention, a semiconductordevice module comprises: a plurality of semiconductor device moduleseach comprising a resin case, a power semiconductor element accommodatedin said resin case, and a control terminal protruding outward from anedge portion of said resin case and to which a control signal forcontrolling said power semiconductor element is inputted; and a controlboard electrically connected to said control terminals; wherein saidplurality of semiconductor device modules are arranged in rows so thattheir respective said edge portions from which said control terminalsprotrude lie next to each other, and said control board is disposed toextend over said edge portions across from one said row to another ofsaid plurality of semiconductor device modules.

[0024] According to the seventh aspect of the semiconductor module ofthe invention, the plurality of semiconductor device modules arearranged so that their edge portions from which the respective controlterminals protrude lie next to each other; thus the control terminalsstand close to each other and the control board can be small in size.

[0025] The objects, features, aspects and advantages of the presentinvention will become more apparent from the following detaileddescription and the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

[0026]FIG. 1 is a perspective view showing the structure of a preferredembodiment of the power semiconductor device of the invention.

[0027]FIG. 2 is a diagram showing the connection of the powersemiconductor elements.

[0028]FIG. 3 is a perspective view showing the structure of thepreferred embodiment of the power semiconductor device of the invention.

[0029]FIG. 4 is a plan view showing the structure of a control board ofthe power semiconductor device of the invention.

[0030]FIG. 5 is a plan view showing the structure of the control boardof the power semiconductor device of the invention.

[0031]FIG. 6 is a plan view showing an example of arrangement ofsemiconductor device modules.

[0032]FIG. 7 is a perspective view showing the structure of asemiconductor device module.

[0033]FIG. 8 is a diagram showing the connection of power semiconductorelements.

[0034]FIG. 9 is a perspective view showing the structure of a variationof the preferred embodiment of the power semiconductor device of theinvention.

[0035]FIG. 10 is a perspective view showing the structure of a variationof the preferred embodiment of the power semiconductor device of theinvention.

[0036]FIG. 11 is a perspective view showing the structure of aconventional semiconductor device module.

BEST MODE FOR CARRYING OUT THE INVENTION Preferred Embodiment

[0037] Device Structure.

[0038]FIG. 1 is a perspective view that shows a semiconductor devicemodule 100 as a preferred embodiment of the power semiconductor deviceof the present invention. FIG. 1 is partially broken to show theinternal structure.

[0039] In FIG. 1, a bottom substrate 12 has a rectangular shape in theplan view and is made of a material having good thermal conductivity,e.g. metal, and an insulating substrate 3 is provided on the bottomsubstrate 12, and a set of one IGBT device 1 and one diode device 2 areprovided on the insulating substrate 3. A box-like resin case 11surrounds the bottom substrate 12, and a resin material is sealed in thespace defined by the bottom substrate 12 and the resin case 11. Thedrawing does not show the resin.

[0040]FIG. 2 shows the connection of the IGBT device 1 and the diodedevice 2. The diode device 2 is connected in parallel with the IGBTdevice 1 in such a direction that the forward current flows back to theIGBT device 1. The IGBT device 1 has a main collector electrode and amain emitter electrode that are externally connected through maincircuit terminals M1 and M2 and a control emitter electrode and a gateelectrode that are externally connected respectively through a controlemitter relay terminal 7 and a gate relay terminal 8. The controlemitter relay terminal 7 and the gate relay terminal 8 can be referredto as control terminals since control signals are inputted to them.

[0041] In FIG. 1, in the peripheral portion of the bottom substrate 12,a relay terminal plate 6 is disposed along the insulating substrate 3,with the IGBT device 1 located closer to the edge on the side of therelay terminal plate 6 on the bottom substrate 12.

[0042] The relay terminal plate 6 has electrically insulated controlemitter pad 71 and gate pad 81 formed on a main surface of an insulatingsubstrate, for example. The control emitter pad 71 is electricallyconnected to the control emitter electrode (or the emitter electrode) ofthe IGBT device 1 through wire interconnection WR (aluminum wire) andthe gate pad 81 is electrically connected to the gate electrode of theIGBT device 1 through wire interconnection WR. The emitter electrode ofthe IGBT device 1 is electrically connected to the anode of the diodedevice 2 through wire interconnection WR.

[0043] The control emitter relay terminal 7 and the gate relay terminal8, which vertically extend, are connected respectively to the controlemitter pad 71 and the gate pad 81; the control emitter relay terminal 7and the gate relay terminal 8 protrude outward from the edge portion ofthe upper surface of the resin case 11.

[0044] The control emitter relay terminal 7 and the control emitter pad71, and the gate relay terminal 8 and the gate pad 81, are connected bysoldering, for example.

[0045] The structure of FIG. 1 also has a relay terminal 9 thatprotrudes along with the control emitter relay terminal 7 and the gaterelay terminal 8. While the relay terminal 9 is connected to a pad 91that is provided on the relay terminal plate 6 alongside the controlemitter pad 71 and the gate pad 81, the pad 91 is connected to nowhere.The pad 91 and the relay terminal 9 are used when necessary, which areconnected, e.g. to a current sense electrode of the IGBT device 1. Thecurrent sense electrode is an electrode to which a current (sensecurrent) flows which corresponds to a very tiny fraction (much less thanone thousandth) of the current flowing to the main emitter electrode; bydetecting the sense current, the IGBT device 1 can be protected fromsurge current and short circuit.

[0046] While the user will decide whether to detect the sense current,previously providing the pad 91 and the relay terminal 9 offers the userconvenience. The module may be provided with only the pad 91, in whichcase the relay terminal 9 will be connected thereto when required.

[0047] The control emitter relay terminal 7, the gate relay terminal 8,and the relay terminal 9 are connected by, e.g. soldering, to thecontrol board 10 disposed above the edge of the semiconductor devicemodule 100.

[0048] The control board 10 has control circuitry (not shown) andelements for controlling operation of the IGBT device 1 and the diodedevice 2, and also has a control emitter interconnection pattern towhich the control emitter relay terminal 7 is connected and a gateinterconnection pattern to which the gate relay terminal 8 is connected,where these interconnection patterns are connected to the controlcircuitry.

[0049] Although FIG. 1 does not show main circuit terminals forexternally connecting the main collector electrode and the main emitterelectrode of the IGBT device 1, the lead paths of the main circuitterminals can be relatively freely selected since the control board 10is disposed outside the semiconductor device module 100 to partiallycover its edge portion.

[0050] Next, a further function of the control board 10 is describedreferring to FIG. 3. While the control board 10 of FIG. 1 is engagedwith the control emitter relay terminal 7, the gate relay terminal 8,and the relay terminal 9 which protrude from one of the four edges ofthe top surface of the semiconductor device module 100, it may bedisposed over the edges of two semiconductor device modules 100 as shownin FIG. 3 and engaged with the control emitter relay terminals 7, gaterelay terminals 8 and relay terminals 9 which protrude at the respectiveedges of the two semiconductor device modules 100 (hereinafter theserelay terminals may be referred to as groups of relay terminals).

[0051] In this structure, the control emitter relay terminals 7 of thetwo semiconductor device modules 100, and their gate relay terminals 8,i.e. relay terminals of the same kind, are electrically connected incommon in the control board 10, so that the two semiconductor devicemodules 100 can be controlled in parallel. Such a structure in which aplurality of semiconductor device modules are controlled in parallel iscalled a module unit.

[0052] In FIG. 3, the control board 10 is supported by supports SPprovided at the four corners and a derive terminal OT is provided on itsupper main surface to externally output operating conditions of thepower semiconductor elements inside and to supply power to the controlcircuitry (not shown).

[0053]FIG. 4 is a plan view, seen from above, of the control board 10engaging with the two semiconductor device modules 100, and FIG. 5 isits plan view seen from below. FIGS. 4 and 5 are partially broken toshow the internal structure of the control board 10.

[0054] As shown in FIG. 4, the control board 10 has a gateinterconnection pattern 82 formed on its upper main surface side toconnect the respective gate relay terminals 8, and it also has, as shownin FIG. 5, an emitter interconnection pattern 72 formed on its lowermain surface side to connect the respective control emitter relayterminals 7, and the two main surfaces are covered by an insulator. Whenit is necessary to connect the respective relay terminals 9, amulti-layer board is used and an interconnection pattern for mutuallyconnecting the relay terminals 9 is formed in a layer between the gateinterconnection pattern 82 and the emitter interconnection pattern 72.

[0055] Needless to say, the emitter interconnection pattern 72 is formedin such a manner that the gate relay terminals 8 and the emitterinterconnection pattern 72 will not come in contact with each other, andthe interconnection patterns and the relay terminals are electricallyconnected firmly by soldering etc.

[0056] As for another structure, other than that shown in FIG. 3, forconnecting two semiconductor device modules 100 in parallel, twosemiconductor device modules 100 may be arranged so that theirrespective relay terminal groups are aligned in a line and connectedwith a control board that connects the relay terminals of the same kindsin common. A structure expanded on the basis of this structure will bedescribed later referring to FIG. 6.

[0057] Now, referring back to FIG. 3, the semiconductor device module100 on the left side in FIG. 3 has a group of relay terminals disposedat the right edge and the semiconductor device module 100 on the rightside has a group of relay terminals disposed at the left edge.

[0058] The area of the control board can thus be reduced by arrangingthe two parallel-controlled semiconductor device modules 100 so thattheir respective relay terminal groups are placed close; for thispurpose, the two semiconductor device modules 100 are arranged inopposite directions and in parallel to each other so that theirrespective edges from which the relay terminal groups protrude lie nextto each other.

[0059] That is to say, in FIG. 3, the semiconductor device module 100 onthe left side in the drawing has its control emitter relay terminal 7located at the farther end and the semiconductor device module 100 onthe right side in the drawing has its relay terminal 9 located at thefarther end; the two semiconductor device modules 100 are thus arrangedin opposite directions.

[0060] While FIG. 3 shows two semiconductor device modules 100 that arecontrolled in parallel with their respective relay terminal groupselectrically connected in common by the control board 10, more than twosemiconductor device modules 100 can be controlled in parallel; forexample, as shown in FIG. 6, a total of six semiconductor device modules100 may be connected to form a module unit by using a control board 20that can connect three semiconductor device modules 100 on each side.

[0061] While the lead paths of the main circuit terminals M1 and M2 canbe freely selected as mentioned before, controlling a plurality ofsemiconductor device modules in parallel requires electricallyconnecting in common the main circuit terminals of the same kinds, M1and M2. As for means for making the connection, in the arrangement ofsemiconductor device modules shown in FIG. 6, for example, it isefficient to dispose strip-like bus bars made of conductor plate asshown by one-dot chain line, so as to mutually connect main circuitterminals of the same kind in a straight line; therefore it is desiredthat main circuit terminals of the same kind be arranged in line withoutany main circuit terminals of a different kind interposed between them.In FIG. 6, the plurality of main circuit terminals M1 and M2 are alignedin respective lines in parallel.

[0062] Needless to say, this is desirable also for a semiconductordevice module having a plurality of main circuit terminals M1 and M2. Aspecific structure of the bus bars is shown in FIG. 10.

[0063] The bus bar not only electrically connects main circuit terminalsof the same kind in common but also functions as means for mechanicallyconnecting the plurality of semiconductor device modules, thus providinga rigidly-structured module unit without a need for specializedconnecting means.

[0064] While FIG. 6 shows semiconductor device modules 100 arranged intwo lines, they may be arranged only in one line. Anyway, a plurality ofsemiconductor device modules can be controlled in parallel by using acontrol board that can connect the same kind of relay terminals incommon.

[0065] While the semiconductor device module 100 shown in FIG. 1 has oneIGBT device 1 and one diode device 2 and one group of relay terminalsfor them, the structure of the semiconductor device module is notlimited to this structure; for example, as shown in FIG. 7, asemiconductor device module 100A may be provided with a plurality ofsets each including an IGBT device 1 and a diode device 2, and one groupof relay terminals for each set.

[0066] In this case, the control board 30 is formed to be connected tothe three groups of relay terminals and the relay terminal plate 6A isformed so that three control emitter pads 71, three gate pads 81 andthree pads 91 can be provided thereon.

[0067] This structure is provided with a plurality of sets of IGBTdevices 1 and diode devices 2, the same number of relay terminal groups,and the same number of sets of the main circuit terminals M1 and M2.

[0068] While the semiconductor device module 100A shown in FIG. 7 has aplurality of sets of IGBT devices 1 and diode devices 2, with one groupof relay terminals for each set, six IGBT devices 1 may be connected inparallel as shown in FIG. 8, with one diode device 2 connected inparallel to each.

[0069] In this case, the gate electrodes of the individual IGBT devices1 are connected to the gate relay terminal 8 in common and their controlemitter electrodes are connected to the control emitter relay terminal 7in common. The main collector electrodes and the main emitter electrodesof the individual IGBT devices 1 are connected to the main circuitterminals M1 and M2 in common.

[0070] In this structure, one group of relay terminals and one set ofmain circuit terminals M1 and M2 are provided for the six sets of IGBTdevices 1 and diode devices 2.

[0071] Functions and Effects

[0072] As described above, in the semiconductor device module 100, thecontrol board 10 is disposed outside the semiconductor device module 100and partially covers the area above the edge of the semiconductor devicemodule 100, so that the lead paths of the main circuit terminals can befreely selected to externally connect the main collector electrode andthe main emitter electrode of the IGBT device 1. The power semiconductorelement and the main circuit terminals can thus be electricallyconnected with ease.

[0073] Furthermore, disposing the control board 10 outside lightensrestrictions on the number and layout of the installed powersemiconductor elements.

[0074] Moreover, since the control emitter relay terminal 7 and the gaterelay terminal 8 protrude outward from the edge portion of the uppersurface of the resin case 11, a plurality of semiconductor devicemodules 100 can be controlled in parallel, with the plurality ofsemiconductor device modules 100 arranged in two rows in parallel insuch a way that their respective relay terminal groups face each other,and with the control board 10 engaging with the relay terminal groups ofthe plurality of semiconductor device modules 100 to mutually connectthe relay terminals of the same kinds in common in the control board100.

[0075] Variation 1.

[0076] In the preferred embodiment shown above, the control board 10 isengaged with the semiconductor device module 100 that has a group ofrelay terminals (i.e. the control emitter relay terminal 7, the gaterelay terminal 8 and the relay terminal 9) that protrude from one of thefour edge portions; however, the control board will be formed in adifferent manner when used with semiconductor device modules having aplurality of relay terminal groups.

[0077]FIG. 9 shows semiconductor device modules 200 each having relayterminal groups protruding from opposite two of its four edge portions.The two semiconductor device modules 200 on the right and left sides inFIG. 9 have the same structure.

[0078] In FIG. 9, each semiconductor device module 200 has relayterminal groups on the two, right and left, edge portions and two setsof main circuit terminals M1 and M2, and M11 and M12.

[0079] The main circuit terminals M1 and M2 form a set with the relayterminal group on the left side in the drawing and the main circuitterminals M11 and M12 form a set with the relay terminal group on theright side.

[0080] A control board 40 is provided to cover the two semiconductordevice modules 200 except in the areas where the main circuit terminalsM1 and M2 and the main circuit terminals M11 and M12 are located.

[0081] The control board 40 has an interconnection pattern PT whichengages with the four relay terminal groups to connect the relayterminals of the same kind in common, so that the two semiconductordevice modules 200 can be controlled in parallel. The use of thiscontrol board 40 increases the freedom of layout of the semiconductordevice modules.

[0082] While the shape of the interconnection pattern PT shown withbroken line in FIG. 9 is just an example, thus forming theinterconnection pattern not in a loop shape similar to the shape of thecontrol board 40 in plan view but in a non-loop shape leaving some areawhere the pattern is absent prevents the problem that the main circuitcurrent flowing through the main circuit terminals M1 and M2 and themain circuit terminals M11 and M12 exerts influence to cause a circularflow of induced current to vary the gate characteristic.

[0083] In the interconnection pattern PT, as described referring to FIG.4, the emitter interconnection pattern 72 is formed on the lower mainsurface side and the gate interconnection pattern 82 is formed on theupper main surface side, so that short circuit between theinterconnection patterns can be prevented.

[0084] In the structure shown above, the control board 40 connects twosemiconductor device modules 200; however, needless to say, the controlboard 40 can be formed larger in size to connect a larger number ofsemiconductor device modules 200.

[0085] Variation 2.

[0086] While the control board 10 described in the preferred embodimentis suited for parallel control of a module unit in which thesemiconductor device modules 100 are arranged in two rows in parallel sothat the relay terminal groups stand adjacent to each other,restrictions on the layout of the semiconductor device modules can belightened by adopting the control board 50 shown in FIG. 10.

[0087] In FIG. 10, a plurality of semiconductor device modules 100 arearranged in two rows and the control board 50 is disposed above them andengaged with the individual relay terminal groups (i.e. the controlemitter relay terminal 7, the gate relay terminal 8, and the relayterminal 9).

[0088] While the semiconductor device modules 100 are arranged so thatthe main circuit terminals of the same kind are aligned, the relayterminal groups do not face each other between the rows.

[0089] This is possible because the control board 50 has an area whichalmost entirely covers the arrangement of the semiconductor devicemodules 100 and it can be engaged with the relay terminal groupsanywhere in this area.

[0090] The restrictions on the arrangement of the semiconductor devicemodules 100 can thus be lightened; however, it is desired that the maincircuit terminals of the same kind be arranged in line since controllinga plurality of semiconductor device modules 100 in parallel requiresconnecting the main circuit terminals of the same kind in common.

[0091] That is to say, as shown in FIG. 10, in the individual rows ofthe semiconductor device modules 100, bus bars B1 and B2 are provided toelectrically connect in common the main circuit terminals M1 and M2aligned in lines.

[0092] For the provision of the bus bars B1 and B2, the control board 50is positioned in a higher position than the bus bars B1 and B2; thecontrol board 50 can be supported in a stable manner on supports SPprovided on the semiconductor device modules 100.

[0093] Also, all the semiconductor device modules 100 can be controlledin parallel by connecting the bus bars B1 in common, and the bus bars B2in common.

[0094] The control board 50 has no opening and is hence structurallystronger and the bus bars B1 and B2 thus connect the main circuitterminals M1 and M2, which provides a structurally stronger module unit.

[0095] While the invention has been described in detail, the foregoingdescription is in all aspects illustrative and not restrictive. It isunderstood that numerous other modifications and variations can bedevised without departing from the scope of the invention.

1. A power semiconductor device, comprising: a plurality ofsemiconductor device modules each comprising, a resin case (11), a powersemiconductor element (1) accommodated in said resin case, a maincircuit terminal (M1, M2) protruding outward from said resin case (11)and in which a main current of said power semiconductor element (1)flows, and a control terminal (7, 8) protruding outward from said resincase (11) and to which a control signal for controlling said powersemiconductor element (1) is inputted; a bus bar electrically connectingin common said main circuit terminals of said plurality of semiconductordevice modules, said main circuit terminals being arranged in line; anda control board (10-50) disposed to at least cover a disposed area ofsaid protruding control terminals (7, 8) of said plurality ofsemiconductor device modules and electrically connected to said controlterminals (7, 8).
 2. The power semiconductor device according to claim1, wherein said control terminal protrudes outward from an edge portionof said resin case (11), and said control board (10-30) is disposed tocover only an area over said edge portions of said plurality ofsemiconductor device modules from which said control terminals (7, 8)protrude.
 3. The power semiconductor device according to claim 2,wherein said plurality of semiconductor device modules are arranged inrows so that their respective said edge portions from which said controlterminals (7, 8) protrude lie next to each other, and said control board(10-30) is disposed to extend over said edge portions across from onesaid row to another of said plurality of semiconductor device modules.4. The power semiconductor device according to claim 1, wherein saidcontrol board (50) is disposed above said bus bar and is sized to coveralmost all of the region where said plurality of semiconductor devicemodules are disposed.
 5. The power semiconductor device according toclaim 1, wherein said control board (40) is disposed to cover saidplurality of semiconductor device modules except in an area where saidmain circuit terminals (M1, M2) are disposed.
 6. The power semiconductordevice according to claim 5, wherein said control board (40) has aninterconnection pattern electrically connecting said control terminals(7, 8) in common, and said interconnection pattern has a non-loop shapein a plan view.
 7. A power semiconductor device, comprising: a pluralityof semiconductor device modules each comprising, a resin case (11), apower semiconductor element (1) accommodated in said resin case, and acontrol terminal (7, 8) protruding outward from an edge portion of saidresin case (11) and to which a control signal for controlling said powersemiconductor element (1) is inputted; and a control board (10-30)electrically connected to said control terminals (7, 8); said pluralityof semiconductor device modules being arranged in rows so that theirrespective said edge portions from which said control terminals (7, 8)protrude lie next to each other, said control board (10-30) beingdisposed to extend over said edge portions across from one said row toanother of said plurality of semiconductor device modules.